VLSI Design Laboratory | Welcome to RMK College of Engineering and Technology

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Digital Course Materials

CSE CSE(AI-DS) CSE(Cyber Security) ECE S&H VLSI

VLSI Design Laboratory

Objectives & Outcomes

The student should be made to:

To learn Hardware Descriptive Language(Verilog/VHDL).
To learn the fundamental principles of VLSI circuit design in digital and analog domain.
To familiarise fusing of logical modules on FPGAs.
To provide hands on design experience with professional design (EDA) platforms.

At the end of the course, the student should be able to:

Write HDL code for basic as well as advanced digital integrated circuits.
Import the logic modules into FPGA Boards.
Synthesize, Place and Route the digital IPs.
Design, Simulate and Extract the layouts of Analog IC Blocks using EDA tools.

List of Major Equipments & Software

FPGA Kits with
XILINX Simulator
Microwind
LT Spice

Area in Sq.mts

160.96 Sq.m

Lab Incharge

Ms. Sangeethalakshmi K